In MOSFET, it is desirable to have a channel as narrow as possible to enhance control of the channel by the gate and suppress short channel effects. However, as the channel length increases, device characteristic may be severely influenced by the short channel effects. Especially for the leakage current in off-state, as the gate length decreases, the ability of control to the channel by the gate is weakened. The device cannot be turned off completely because of the Drain Induction Barrier Lower (DIBL) effects and large leakage current is generated.
Drain Induction Barrier Lower (DIBL) is a non-ideal effect in short channel devices. When channel length decreases, source-drain voltage may increase such that P-N junction depletion regions of source and drain becomes closer and electric line in channel may punch through from source to drain, which may cause decrease of potential barrier in source end and increase of carriers from source to channel and thereby lead to increase of current in drain end. With further decrease of channel length, threshold voltage of transistors may decrease due to increasingly severe DIBL effects, which may result in decrease of device voltage gain and restrict improvement of integration level of Very Large Scale Integrated Circuits (VLSIC).
In the present disclosure, a method for controlling leakage current in off-state in MOSFET is provided. Specifically, insulators are formed on both sides of the gate in the semiconductor substrate. The insulators are located under the gate by 60-70 nm, and have a width of about 15-25 nm. The insulators are located very close to but not connected with the source and drain regions. By formation of insulators between the source and drain regions, the dielectric constant between the source and drain regions can be effectively increased and the capacitance coupling can be decreased. Further, by formation of the insulators between the source and the drain regions, the leakage current in the range of the thickness of the insulator can be reduced, and the leakage current above the range of the thickness of the insulator can be under control of the gate and turned off effectively. The current under the thickness of the insulator is located far away from the channel, and has a small influence on device performance. By means of the present invention, negative effects of DIBL on the device can be effectively reduced, leakage current in the device can be suppressed, and device performance can be enhanced.